Collaboration diagram for USART:
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USART Control Register | |
#define | US_CR_OFF |
USART control register offset. | |
#define | US0_CR |
Channel 0 control register address. | |
#define | US1_CR |
Channel 1 control register address. | |
#define | US_RSTRX |
Reset receiver. | |
#define | US_RSTTX |
Reset transmitter. | |
#define | US_RXEN |
Receiver enable. | |
#define | US_RXDIS |
Receiver disable. | |
#define | US_TXEN |
Transmitter enable. | |
#define | US_TXDIS |
Transmitter disable. | |
#define | US_RSTSTA |
Reset status bits. | |
#define | US_STTBRK |
Start break. | |
#define | US_STPBRK |
Stop break. | |
#define | US_STTTO |
Start timeout. | |
#define | US_SENDA |
Send next byte with address bit set. | |
Mode Register | |
#define | US_MR_OFF |
USART mode register offset. | |
#define | US0_MR |
Channel 0 mode register address. | |
#define | US1_MR |
Channel 1 mode register address. | |
#define | US_CLKS |
Clock selection mask. | |
#define | US_CLKS_MCK |
Master clock. | |
#define | US_CLKS_MCK8 |
Master clock divided by 8. | |
#define | US_CLKS_SCK |
External clock. | |
#define | US_CLKS_SLCK |
Slow clock. | |
#define | US_CHRL |
Masks data length. | |
#define | US_CHRL_5 |
5 data bits. | |
#define | US_CHRL_6 |
6 data bits. | |
#define | US_CHRL_7 |
7 data bits. | |
#define | US_CHRL_8 |
8 data bits. | |
#define | US_SYNC |
Synchronous mode enable. | |
#define | US_PAR |
Parity mode mask. | |
#define | US_PAR_EVEN |
Even parity. | |
#define | US_PAR_ODD |
Odd parity. | |
#define | US_PAR_SPACE |
Space parity. | |
#define | US_PAR_MARK |
Marked parity. | |
#define | US_PAR_NO |
No parity. | |
#define | US_PAR_MULTIDROP |
Multi-drop mode. | |
#define | US_NBSTOP |
Masks stop bit length. | |
#define | US_NBSTOP_1 |
1 stop bit. | |
#define | US_NBSTOP_1_5 |
1.5 stop bits. | |
#define | US_NBSTOP_2 |
2 stop bits. | |
#define | US_CHMODE |
Channel mode mask. | |
#define | US_CHMODE_NORMAL |
Normal mode. | |
#define | US_CHMODE_AUTOMATIC_ECHO |
Automatic echo. | |
#define | US_CHMODE_LOCAL_LOOPBACK |
Local loopback. | |
#define | US_CHMODE_REMOTE_LOOPBACK |
Remote loopback. | |
#define | US_MODE9 |
9 bit mode. | |
#define | US_CLKO |
Baud rate output enable. | |
Status and Interrupt Register | |
#define | US_CSR_OFF |
USART status register offset. | |
#define | US0_CSR |
Channel 0 status register address. | |
#define | US1_CSR |
Channel 1 status register address. | |
#define | US_IER_OFF |
USART interrupt enable register offset. | |
#define | US0_IER |
Channel 0 interrupt enable register address. | |
#define | US1_IER |
Channel 1 interrupt enable register address. | |
#define | US_IDR_OFF |
USART interrupt disable register offset. | |
#define | US0_IDR |
Channel 0 interrupt disable register address. | |
#define | US1_IDR |
Channel 1 interrupt disable register address. | |
#define | US_IMR_OFF |
USART interrupt mask register offset. | |
#define | US0_IMR |
Channel 0 interrupt mask register address. | |
#define | US1_IMR |
Channel 1 interrupt mask register address. | |
#define | US_RXRDY |
Receiver ready. | |
#define | US_TXRDY |
Transmitter ready. | |
#define | US_RXBRK |
Receiver break. | |
#define | US_ENDRX |
End of receiver PDC transfer. | |
#define | US_ENDTX |
End of transmitter PDC transfer. | |
#define | US_OVRE |
Overrun error. | |
#define | US_FRAME |
Framing error. | |
#define | US_PARE |
Parity error. | |
#define | US_TIMEOUT |
Receiver timeout. | |
#define | US_TXEMPTY |
Transmitter empty. | |
#define | AT91_US_BAUD(baud) |
Baud rate calculation helper macro. | |
Receiver Holding Register | |
#define | US_RHR_OFF |
USART receiver holding register offset. | |
#define | US0_RHR |
Channel 0 receiver holding register address. | |
#define | US1_RHR |
Channel 1 receiver holding register address. | |
Transmitter Holding Register | |
#define | US_THR_OFF |
USART transmitter holding register offset. | |
#define | US0_THR |
Channel 0 transmitter holding register address. | |
#define | US1_THR |
Channel 1 transmitter holding register address. | |
Baud Rate Generator Register | |
#define | US_BRGR_OFF |
USART baud rate register offset. | |
#define | US0_BRGR |
Channel 0 baud rate register address. | |
#define | US1_BRGR |
Channel 1 baud rate register address. | |
Receiver Timeout Register | |
#define | US_RTOR_OFF |
USART receiver timeout register offset. | |
#define | US0_RTOR |
Channel 0 receiver timeout register address. | |
#define | US1_RTOR |
Channel 1 receiver timeout register address. | |
Transmitter Time Guard Register | |
#define | US_TTGR_OFF |
USART transmitter time guard register offset. | |
#define | US0_TTGR |
Channel 0 transmitter time guard register address. | |
#define | US1_TTGR |
Channel 1 transmitter time guard register address. | |
Receive Pointer Register | |
#define | US_RPR_OFF |
USART receive pointer register offset. | |
#define | US0_RPR |
Channel 0 receive pointer register address. | |
#define | US1_RPR |
Channel 1 receive pointer register address. | |
Receive Counter Register | |
#define | US_RCR_OFF |
USART receive counter register offset. | |
#define | US0_RCR |
Channel 0 receive counter register address. | |
#define | US1_RCR |
Channel 1 receive counter register address. | |
Transmit Pointer Register | |
#define | US_TPR_OFF |
USART transmit pointer register offset. | |
#define | US0_TPR |
Channel 0 transmit pointer register address. | |
#define | US1_TPR |
Channel 1 transmit pointer register address. | |
Transmit Counter Register | |
#define | US_TCR_OFF |
USART transmit counter register offset. | |
#define | US0_TCR |
Channel 0 transmit counter register address. | |
#define | US1_TCR |
Channel 1 transmit counter register address. | |
AT91 USART0 Device | |
NUTDEVICE | devUsartAt910 |
USART0 device information structure. | |
AT91 USART1 Device | |
NUTDEVICE | devUsartAt911 |
USART1 device information structure. | |
Defines | |
#define | USART1_BASE |
USART 1 base address. | |
#define | USART0_BASE |
USART 0 base address. | |
#define | ASCII_XON |
#define | ASCII_XOFF |
#define | XON_PENDING |
#define | XOFF_PENDING |
#define | XOFF_SENT |
#define | XOFF_RCVD |
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Baud rate calculation helper macro.
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Initial value: { 0, {'u', 'a', 'r', 't', '0', 0, 0, 0, 0}, IFTYP_CHAR, 0, 0, 0, &dcb_usart0, UsartInit, UsartIOCtl, UsartRead, UsartWrite, UsartOpen, UsartClose, UsartSize } An application must pass a pointer to this structure to NutRegisterDevice() before using the serial communication driver of the AT91's on-chip USART0. The device is named uart0. |
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Initial value: { 0, {'u', 'a', 'r', 't', '1', 0, 0, 0, 0}, IFTYP_CHAR, 1, 0, 0, &dcb_usart1, UsartInit, UsartIOCtl, UsartRead, UsartWrite, UsartOpen, UsartClose, UsartSize } An application must pass a pointer to this structure to NutRegisterDevice() before using the serial communication driver of the AT91's on-chip USART1. The device is named uart1. |